User contributions
From The ECRYPT Hash Function Website
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- 15:53, 22 May 2012 (diff | hist) . . (-3,599) . . m SHA-3 Hardware Implementations Round Three (→Low-Area Implementations (ASIC))
- 15:51, 22 May 2012 (diff | hist) . . (-139) . . m SHA-3 Hardware Implementations Round Three (→High-Speed Implementations (ASIC))
- 15:50, 22 May 2012 (diff | hist) . . (-19,564) . . m SHA-3 Hardware Implementations Round Three (→High-Speed Implementations (ASIC))
- 15:47, 22 May 2012 (diff | hist) . . (-4,338) . . m SHA-3 Hardware Implementations Round Three (→Low-Area Implementations (FPGA))
- 15:45, 22 May 2012 (diff | hist) . . (-35,549) . . m SHA-3 Hardware Implementations Round Three
- 15:38, 22 May 2012 (diff | hist) . . (+1,300) . . m SHA-3 Hardware Implementations Round Three
- 14:50, 22 May 2012 (diff | hist) . . (+402) . . m SHA-3 Hardware Implementations Round Three
- 12:30, 22 May 2012 (diff | hist) . . (+32) . . m SHA-3 Hardware Implementations Round Three
- 12:26, 22 May 2012 (diff | hist) . . (+177,923) . . Nm SHA-3 Hardware Implementations Round Three (Created a scratch page for building the round three page)
- 12:19, 22 May 2012 (diff | hist) . . (+177,798) . . Nm SHA-3 Hardware Implementations Round Two (Created archived version of round two page) (current)
- 14:29, 20 January 2011 (diff | hist) . . (+49) . . m SHA-3 Hardware Implementations (→All 14 Round-Two Candidates: Updated results according to latest revision of the paper on Eprint)
- 13:57, 20 January 2011 (diff | hist) . . (-341) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (FPGA): Updated results from Homsirikamol et al. (from revised Eprint paper version))
- 12:13, 20 January 2011 (diff | hist) . . (+29) . . m SHA-3 Hardware Implementations (→All 14 Round-Two Candidates: Updated source code availability)
- 12:12, 20 January 2011 (diff | hist) . . (+1,623) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (FPGA): Updated source code availability for reference [30])
- 11:31, 22 November 2010 (diff | hist) . . (+588) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (ASIC): Added link for HDL sources for Guo et al. [35])
- 11:24, 22 November 2010 (diff | hist) . . (+42) . . m SHA-3 Hardware Implementations (→All 14 Round-Two Candidates: Added link to HDL source)
- 11:11, 9 November 2010 (diff | hist) . . (+383) . . m SHA-3 Hardware Implementations (→Low-Area Implementations (FPGA): Added Virtex 5 result from updated [27])
- 11:09, 9 November 2010 (diff | hist) . . (0) . . m SHA-3 Hardware Implementations (→Low-Area Implementations (ASIC): Updated ref [27])
- 11:08, 9 November 2010 (diff | hist) . . (+19) . . m SHA-3 Hardware Implementations (→References: Updated ref [27])
- 09:30, 19 October 2010 (diff | hist) . . (+868) . . m SHA-3 Hardware Implementations (→Low-Area Implementations (FPGA): Added results from El Hadedy et al. ([41]))
- 09:21, 19 October 2010 (diff | hist) . . (+284) . . m SHA-3 Hardware Implementations (→References: Added reference for El Hadedy et al. ([41]))
- 10:41, 12 October 2010 (diff | hist) . . (-117) . . m SHA-3 Hardware Implementations (→References: Updated reference [30])
- 10:39, 12 October 2010 (diff | hist) . . (+4,306) . . m SHA-3 Hardware Implementations (→All 14 Round-Two Candidates: Added Altera Stratix III results from Homsirikamol et al.)
- 10:19, 12 October 2010 (diff | hist) . . (+2,052) . . m SHA-3 Hardware Implementations (→All 14 Round-Two Candidates: Replaced Virtex 5 results from Gaj et al. (CHES 2010) with those of Homsirikamol et al.)
- 10:01, 12 October 2010 (diff | hist) . . (+12,394) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (FPGA): Updated results from Gaj et al. (CHES 2010) with results from Homsirikamol et al.)
- 10:04, 15 September 2010 (diff | hist) . . (+368) . . m SHA-3 Hardware Implementations (→Low-Area Implementations (ASIC): Added results from RCIS webpage [39])
- 10:03, 15 September 2010 (diff | hist) . . (+741) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (ASIC): Added results from RCIS webpage [39])
- 09:56, 15 September 2010 (diff | hist) . . (+139) . . m SHA-3 Hardware Implementations (→References: Added reference for RCIS webpage (other ASIC implementations))
- 16:03, 14 September 2010 (diff | hist) . . (+93) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (ASIC): Added results from Satoh et al. [38])
- 16:00, 14 September 2010 (diff | hist) . . (+423) . . m SHA-3 Hardware Implementations (→Low-Area Implementations (ASIC): Added results from Satoh et al. [38])
- 15:55, 14 September 2010 (diff | hist) . . (+372) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (ASIC): Added results from Satoh et al. [38])
- 15:49, 14 September 2010 (diff | hist) . . (+338) . . m SHA-3 Hardware Implementations (→References: Added reference for Satoh et al.)
- 15:30, 14 September 2010 (diff | hist) . . (+5,223) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (ASIC): Added ASIC results for implementations of Matsuo et al. (from [37]))
- 15:21, 14 September 2010 (diff | hist) . . (+113) . . m SHA-3 Hardware Implementations (→References: Added reference for standard-cell versions of implementations from Matsuo et al.)
- 15:18, 14 September 2010 (diff | hist) . . (+2,648) . . m SHA-3 Hardware Implementations (→All 14 Round-Two Candidates: Added 90 nm results from RCIS webpage)
- 10:41, 14 September 2010 (diff | hist) . . (+1,092) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (FPGA): Added link to HDL sources for [33])
- 10:31, 14 September 2010 (diff | hist) . . (+77) . . m SHA-3 Hardware Implementations (→All 14 Round-Two Candidates: Added link to HDL sources for Matsuo et al.)
- 18:32, 6 September 2010 (diff | hist) . . (-4) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (ASIC): Corrected gate count for Guo et al. and Akin et al.)
- 18:28, 6 September 2010 (diff | hist) . . (-1) . . m SHA-3 Hardware Implementations (→All 14 Round-Two Candidates: Corrected gate count)
- 18:26, 6 September 2010 (diff | hist) . . (-5) . . m SHA-3 Hardware Implementations (→Blue Midnight Wish, Keccak, Luffa: Corrected gate count)
- 18:25, 6 September 2010 (diff | hist) . . (+360) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (ASIC): Added results from Walker et al.)
- 18:21, 6 September 2010 (diff | hist) . . (+259) . . m SHA-3 Hardware Implementations (→References: Added reference for Walker et al.)
- 18:18, 6 September 2010 (diff | hist) . . (+4,509) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (ASIC): Added results from Guo et al.)
- 18:13, 6 September 2010 (diff | hist) . . (+2,490) . . m SHA-3 Hardware Implementations (→Comparative Studies: Added results from Guo et al.)
- 18:02, 6 September 2010 (diff | hist) . . (+37) . . m SHA-3 Hardware Implementations (→All 14 Round-Two Candidates: Added note that results listed for Tillich et al. are just the post-synthesis ones.)
- 18:01, 6 September 2010 (diff | hist) . . (+341) . . m SHA-3 Hardware Implementations (→References: Added reference for Guo et al.)
- 17:45, 6 September 2010 (diff | hist) . . (+1,094) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (ASIC): Added results from Akin et al.)
- 17:43, 6 September 2010 (diff | hist) . . (+3,365) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (FPGA): Added results from Akin et al.)
- 17:40, 6 September 2010 (diff | hist) . . (+1) . . m SHA-3 Hardware Implementations (→Blue Midnight Wish, Keccak, Luffa)
- 17:34, 6 September 2010 (diff | hist) . . (+5,017) . . m SHA-3 Hardware Implementations (→Comparative Studies: Added results from Akin et al.)
- 17:13, 6 September 2010 (diff | hist) . . (+403) . . m SHA-3 Hardware Implementations (→References: Added reference for Akin et al.)
- 17:05, 6 September 2010 (diff | hist) . . (+4,889) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (FPGA): Added results from Matsuo et al.)
- 16:59, 6 September 2010 (diff | hist) . . (+2,476) . . m SHA-3 Hardware Implementations (→Comparative Studies: Addes results from Matsuo et al.)
- 16:42, 6 September 2010 (diff | hist) . . (+415) . . m SHA-3 Hardware Implementations (→References: Added reference for Matsuo et al.)
- 16:36, 6 September 2010 (diff | hist) . . (+762) . . m SHA-3 Hardware Implementations (→Low-Area Implementations (FPGA): Added results from El Hadedy et al.)
- 16:28, 6 September 2010 (diff | hist) . . (+379) . . m SHA-3 Hardware Implementations (→References: Added reference for El Hadedy et al.)
- 16:23, 6 September 2010 (diff | hist) . . (+10,721) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (FPGA): Added results from Baldwin et al. (2nd SHA-3))
- 16:14, 6 September 2010 (diff | hist) . . (+4,099) . . m SHA-3 Hardware Implementations (→Comparative Studies: Added results from Baldwin et al. (no wrapper, long messages))
- 15:30, 6 September 2010 (diff | hist) . . (+351) . . m SHA-3 Hardware Implementations (→References: Added reference for Baldwin et al. (2nd SHA-3 workshop))
- 15:07, 6 September 2010 (diff | hist) . . (+4,036) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (FPGA): Added results from Gaj et al. (Xilinx 5 ATHENa benchmarking))
- 14:43, 6 September 2010 (diff | hist) . . (+369) . . m SHA-3 Hardware Implementations (→References: Added reference for Gaj et al.)
- 14:40, 6 September 2010 (diff | hist) . . (+2,631) . . m SHA-3 Hardware Implementations (→Comparative Studies: Added results from Gaj et al. (for Virtex 5))
- 14:15, 6 September 2010 (diff | hist) . . (+5,110) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (ASIC): Added results from Henzen et al.)
- 14:08, 6 September 2010 (diff | hist) . . (0) . . m SHA-3 Hardware Implementations (→All 14 Round-Two Candidates)
- 14:04, 6 September 2010 (diff | hist) . . (+563) . . m SHA-3 Hardware Implementations (→All 14 Round-Two Candidates: Added implementation details for Henzen et al.)
- 13:55, 6 September 2010 (diff | hist) . . (+362) . . m SHA-3 Hardware Implementations (→References: Added reference for Henzen et al.)
- 13:51, 6 September 2010 (diff | hist) . . (+2,484) . . m SHA-3 Hardware Implementations (→Comparative Studies: Added results for 20 Gbps target from Henzen et al.)
- 13:12, 6 September 2010 (diff | hist) . . (+771) . . m SHA-3 Hardware Implementations (Added section for ongoing HW benchmarking efforts (mentioning ATHENa))
- 13:48, 31 August 2010 (diff | hist) . . (+1,528) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (FPGA): Added tradeoff implementations from Ramakers and Narinx)
- 13:44, 31 August 2010 (diff | hist) . . (+470) . . m SHA-3 Hardware Implementations (→ECHO, Hamsi, Luffa: Added tradeoff versions from Ramakers and Narinx)
- 10:51, 31 August 2010 (diff | hist) . . (+85) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (FPGA): Corrected description of implementations of Ramakers and Narinx)
- 10:49, 31 August 2010 (diff | hist) . . (+85) . . m SHA-3 Hardware Implementations (→ECHO, Hamsi, Luffa: Corrected description of implementations from Ramakers and Narinx)
- 10:06, 31 August 2010 (diff | hist) . . (+346) . . m SHA-3 Hardware Implementations (→Low-Area Implementations (FPGA): Added combined ECHO/AES results from Beuchat)
- 13:02, 27 August 2010 (diff | hist) . . (+144) . . m SHA-3 Hardware Implementations (→References: Added reference for Mabrouk and Benadjila)
- 12:58, 27 August 2010 (diff | hist) . . (+837) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (FPGA): Added results from Mabrouk and Benadjila)
- 12:39, 27 August 2010 (diff | hist) . . (+289) . . m SHA-3 Hardware Implementations (→References: Added reference for Mikami et al.)
- 12:37, 27 August 2010 (diff | hist) . . (+348) . . m SHA-3 Hardware Implementations (→Low-Area Implementations (ASIC): Added results from Mikami et al.)
- 10:23, 2 August 2010 (diff | hist) . . (+42) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (FPGA): Added link to HDL sources for [26])
- 15:22, 21 July 2010 (diff | hist) . . (+310) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (FPGA): Added results of Francq and Thuillet)
- 15:16, 21 July 2010 (diff | hist) . . (+277) . . m SHA-3 Hardware Implementations (→References: Added Francq and Thuillet. Corrected reference [24].)
- 09:29, 21 July 2010 (diff | hist) . . (+112) . . m SHA-3 Hardware Implementations (→ECHO, Hamsi, Luffa: Added VHDL sources link)
- 09:28, 21 July 2010 (diff | hist) . . (+336) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (FPGA): Added sources for work of Ramakers and Narinx (hosted by SHA-3 zoo as per request of the authors))
- 09:25, 21 July 2010 (diff | hist) . . (+94) . . N File:Ramakers Narinx2010ECHO-Hamsi-Luffa VHDL sources.zip (VHDL sources sent by Wim Ramakers on July 19, 2010 with request to be hosted on SHA-3 webpage.) (current)
- 09:06, 21 July 2010 (diff | hist) . . (+1,271) . . m SHA-3 Hardware Implementations (→Comparative Studies: Added results of Ramakers and Narinx)
- 09:02, 21 July 2010 (diff | hist) . . (+7) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (FPGA): Corrected categorization of Hamsi implemenation of Ramakers and Narinx following comment from authors)
- 10:14, 20 July 2010 (diff | hist) . . (+1,153) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (FPGA): Added results from Ramakers and Narinx)
- 09:42, 20 July 2010 (diff | hist) . . (+502) . . m SHA-3 Hardware Implementations (→References: Added Ramakers and Narinx.)
- 09:28, 20 July 2010 (diff | hist) . . (+102) . . N File:Ramakers Narinx2010ECHO-Hamsi-Luffa Thesis DUTCH.pdf (Full thesis in Dutch sent by Wim Ramakers on July 10, 2010 with request to be hosted on SHA-3 webpage.) (current)
- 09:27, 20 July 2010 (diff | hist) . . (+110) . . N File:Ramakers Narinx2010ECHO-Hamsi-Luffa ExtendedAbstract ENGLISH.pdf (Extended abstract in English sent by Wim Ramakers on July 10, 2010 with request to be hosted on SHA-3 webpage.) (current)
- 08:39, 7 July 2010 (diff | hist) . . (+328) . . m SHA-3 Hardware Implementations (→Low-Area Implementations (FPGA): Added results of Beuchat et al. (ECHO))
- 08:31, 7 July 2010 (diff | hist) . . (+172) . . m SHA-3 Hardware Implementations (→References: Added Beuchat et al. (compact ECHO))
- 11:06, 20 May 2010 (diff | hist) . . (+30) . . m SHA-3 Hardware Implementations (→Low-Area Implementations (FPGA): Added remark to Detrey et al,'s HDL code link)
- 11:06, 20 May 2010 (diff | hist) . . (+30) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (FPGA): Added remark to Detrey et al,'s HDL code link)
- 11:00, 20 May 2010 (diff | hist) . . (+674) . . m SHA-3 Hardware Implementations (→Low-Area Implementations (FPGA): Added results from Detrey et al.)
- 10:58, 20 May 2010 (diff | hist) . . (+229) . . m SHA-3 Hardware Implementations (→References: Added reference for Detrey et al.)
- 10:55, 20 May 2010 (diff | hist) . . (+666) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (FPGA): Added results from Detrey et al. for Shabal)
- 11:59, 11 May 2010 (diff | hist) . . (+680) . . m SHA-3 Hardware Implementations (→Low-Area Implementations (FPGA): Added results from Jungk and Reith)
- 11:54, 11 May 2010 (diff | hist) . . (+193) . . m SHA-3 Hardware Implementations (→References: Added reference for Jungk and Reith.)
- 11:52, 11 May 2010 (diff | hist) . . (+298) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (FPGA): Added results from Jungk and Reith)
- 09:11, 26 April 2010 (diff | hist) . . (+121) . . m SHA-3 Hardware Implementations (→All 14 Round-Two Candidates: Updated results to paper version 2.0 and added missing entry for Skein-256-256)
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