User contributions
From The ECRYPT Hash Function Website
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- 09:21, 19 October 2010 (diff | hist) . . (+284) . . m SHA-3 Hardware Implementations (→References: Added reference for El Hadedy et al. ([41]))
- 10:41, 12 October 2010 (diff | hist) . . (-117) . . m SHA-3 Hardware Implementations (→References: Updated reference [30])
- 10:39, 12 October 2010 (diff | hist) . . (+4,306) . . m SHA-3 Hardware Implementations (→All 14 Round-Two Candidates: Added Altera Stratix III results from Homsirikamol et al.)
- 10:19, 12 October 2010 (diff | hist) . . (+2,052) . . m SHA-3 Hardware Implementations (→All 14 Round-Two Candidates: Replaced Virtex 5 results from Gaj et al. (CHES 2010) with those of Homsirikamol et al.)
- 10:01, 12 October 2010 (diff | hist) . . (+12,394) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (FPGA): Updated results from Gaj et al. (CHES 2010) with results from Homsirikamol et al.)
- 10:04, 15 September 2010 (diff | hist) . . (+368) . . m SHA-3 Hardware Implementations (→Low-Area Implementations (ASIC): Added results from RCIS webpage [39])
- 10:03, 15 September 2010 (diff | hist) . . (+741) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (ASIC): Added results from RCIS webpage [39])
- 09:56, 15 September 2010 (diff | hist) . . (+139) . . m SHA-3 Hardware Implementations (→References: Added reference for RCIS webpage (other ASIC implementations))
- 16:03, 14 September 2010 (diff | hist) . . (+93) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (ASIC): Added results from Satoh et al. [38])
- 16:00, 14 September 2010 (diff | hist) . . (+423) . . m SHA-3 Hardware Implementations (→Low-Area Implementations (ASIC): Added results from Satoh et al. [38])
- 15:55, 14 September 2010 (diff | hist) . . (+372) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (ASIC): Added results from Satoh et al. [38])
- 15:49, 14 September 2010 (diff | hist) . . (+338) . . m SHA-3 Hardware Implementations (→References: Added reference for Satoh et al.)
- 15:30, 14 September 2010 (diff | hist) . . (+5,223) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (ASIC): Added ASIC results for implementations of Matsuo et al. (from [37]))
- 15:21, 14 September 2010 (diff | hist) . . (+113) . . m SHA-3 Hardware Implementations (→References: Added reference for standard-cell versions of implementations from Matsuo et al.)
- 15:18, 14 September 2010 (diff | hist) . . (+2,648) . . m SHA-3 Hardware Implementations (→All 14 Round-Two Candidates: Added 90 nm results from RCIS webpage)
- 10:41, 14 September 2010 (diff | hist) . . (+1,092) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (FPGA): Added link to HDL sources for [33])
- 10:31, 14 September 2010 (diff | hist) . . (+77) . . m SHA-3 Hardware Implementations (→All 14 Round-Two Candidates: Added link to HDL sources for Matsuo et al.)
- 18:32, 6 September 2010 (diff | hist) . . (-4) . . m SHA-3 Hardware Implementations (→High-Speed Implementations (ASIC): Corrected gate count for Guo et al. and Akin et al.)
- 18:28, 6 September 2010 (diff | hist) . . (-1) . . m SHA-3 Hardware Implementations (→All 14 Round-Two Candidates: Corrected gate count)
- 18:26, 6 September 2010 (diff | hist) . . (-5) . . m SHA-3 Hardware Implementations (→Blue Midnight Wish, Keccak, Luffa: Corrected gate count)
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