User contributions

From The ECRYPT Hash Function Website

For STillich (talk | block log | uploads | logs)

Search for contributions

 Show contributions of new accounts only
 IP address or username:

Namespace:  all (Main) Talk User User talk The ECRYPT Hash Function Website The ECRYPT Hash Function Website talk File File talk MediaWiki MediaWiki talk Template Template talk Help Help talk Category Category talk   Invert selection  Associated namespace 

Tag filter: 

 Only show edits that are latest revisions Only show edits that are page creations Hide minor edits

From date:

To date:

(newest | oldest) View (newer 100 | older 100) (20 | 50 | 100 | 250 | 500)

• 11:23, 23 May 2012 (diff | hist) . . (+296)‎ . . SHA-3 Hardware Implementations Round Three ‎ (→‎Low-Area Implementations (ASIC))
• 19:02, 22 May 2012 (diff | hist) . . (+2)‎ . . m SHA-3 Hardware Implementations Round Three ‎ (→‎High-Speed Implementations (FPGA))
• 19:00, 22 May 2012 (diff | hist) . . (+2)‎ . . m SHA-3 Hardware Implementations Round Three ‎ (→‎Low-Area Implementations (FPGA))
• 18:56, 22 May 2012 (diff | hist) . . (+17)‎ . . m SHA-3 Hardware Implementations Round Three ‎ (→‎High-Speed Implementations (ASIC))
• 18:45, 22 May 2012 (diff | hist) . . (+485)‎ . . m SHA-3 Hardware Implementations Round Three ‎ (→‎High-Speed Implementations (ASIC))
• 18:43, 22 May 2012 (diff | hist) . . (+515)‎ . . m SHA-3 Hardware Implementations Round Three ‎ (→‎Low-Area Implementations (FPGA))
• 18:34, 22 May 2012 (diff | hist) . . (+11)‎ . . m SHA-3 Hardware Implementations Round Three ‎ (→‎High-Speed Implementations (FPGA))
• 18:17, 22 May 2012 (diff | hist) . . (+28)‎ . . m SHA-3 Hardware Implementations Round Three ‎
• 18:16, 22 May 2012 (diff | hist) . . (+1)‎ . . SHA-3 Hardware Implementations Round Three ‎ (→‎Tweaks of Round Three Candidates over Round Two)
• 18:15, 22 May 2012 (diff | hist) . . (+476)‎ . . m SHA-3 Hardware Implementations Round Three ‎ (→‎High-Speed Implementations (FPGA))
• 18:14, 22 May 2012 (diff | hist) . . (+560)‎ . . m SHA-3 Hardware Implementations Round Three ‎ (→‎High-Speed Implementations (FPGA))
• 18:13, 22 May 2012 (diff | hist) . . (0)‎ . . m SHA-3 Hardware Implementations Round Three ‎ (→‎High-Speed Implementations (FPGA))
• 18:13, 22 May 2012 (diff | hist) . . (0)‎ . . m SHA-3 Hardware Implementations Round Three ‎ (→‎High-Speed Implementations (FPGA))
• 18:12, 22 May 2012 (diff | hist) . . (+28)‎ . . m SHA-3 Hardware Implementations Round Three ‎ (→‎High-Speed Implementations (FPGA))
• 18:04, 22 May 2012 (diff | hist) . . (-24,273)‎ . . m SHA-3 Hardware Implementations Round Three ‎
• 17:53, 22 May 2012 (diff | hist) . . (-3,599)‎ . . m SHA-3 Hardware Implementations Round Three ‎ (→‎Low-Area Implementations (ASIC))
• 17:51, 22 May 2012 (diff | hist) . . (-139)‎ . . m SHA-3 Hardware Implementations Round Three ‎ (→‎High-Speed Implementations (ASIC))
• 17:50, 22 May 2012 (diff | hist) . . (-19,564)‎ . . m SHA-3 Hardware Implementations Round Three ‎ (→‎High-Speed Implementations (ASIC))
• 17:47, 22 May 2012 (diff | hist) . . (-4,338)‎ . . m SHA-3 Hardware Implementations Round Three ‎ (→‎Low-Area Implementations (FPGA))
• 17:45, 22 May 2012 (diff | hist) . . (-35,549)‎ . . m SHA-3 Hardware Implementations Round Three ‎
• 17:38, 22 May 2012 (diff | hist) . . (+1,300)‎ . . m SHA-3 Hardware Implementations Round Three ‎
• 16:50, 22 May 2012 (diff | hist) . . (+402)‎ . . m SHA-3 Hardware Implementations Round Three ‎
• 14:30, 22 May 2012 (diff | hist) . . (+32)‎ . . m SHA-3 Hardware Implementations Round Three ‎
• 14:26, 22 May 2012 (diff | hist) . . (+177,923)‎ . . Nm SHA-3 Hardware Implementations Round Three ‎ (Created a scratch page for building the round three page)
• 14:19, 22 May 2012 (diff | hist) . . (+177,798)‎ . . Nm SHA-3 Hardware Implementations Round Two ‎ (Created archived version of round two page) (current)
• 16:29, 20 January 2011 (diff | hist) . . (+49)‎ . . m SHA-3 Hardware Implementations ‎ (→‎All 14 Round-Two Candidates: Updated results according to latest revision of the paper on Eprint)
• 15:57, 20 January 2011 (diff | hist) . . (-341)‎ . . m SHA-3 Hardware Implementations ‎ (→‎High-Speed Implementations (FPGA): Updated results from Homsirikamol et al. (from revised Eprint paper version))
• 14:13, 20 January 2011 (diff | hist) . . (+29)‎ . . m SHA-3 Hardware Implementations ‎ (→‎All 14 Round-Two Candidates: Updated source code availability)
• 14:12, 20 January 2011 (diff | hist) . . (+1,623)‎ . . m SHA-3 Hardware Implementations ‎ (→‎High-Speed Implementations (FPGA): Updated source code availability for reference [30])
• 13:31, 22 November 2010 (diff | hist) . . (+588)‎ . . m SHA-3 Hardware Implementations ‎ (→‎High-Speed Implementations (ASIC): Added link for HDL sources for Guo et al. [35])
• 13:24, 22 November 2010 (diff | hist) . . (+42)‎ . . m SHA-3 Hardware Implementations ‎ (→‎All 14 Round-Two Candidates: Added link to HDL source)
• 13:11, 9 November 2010 (diff | hist) . . (+383)‎ . . m SHA-3 Hardware Implementations ‎ (→‎Low-Area Implementations (FPGA): Added Virtex 5 result from updated [27])
• 13:09, 9 November 2010 (diff | hist) . . (0)‎ . . m SHA-3 Hardware Implementations ‎ (→‎Low-Area Implementations (ASIC): Updated ref [27])
• 13:08, 9 November 2010 (diff | hist) . . (+19)‎ . . m SHA-3 Hardware Implementations ‎ (→‎References: Updated ref [27])
• 11:30, 19 October 2010 (diff | hist) . . (+868)‎ . . m SHA-3 Hardware Implementations ‎ (→‎Low-Area Implementations (FPGA): Added results from El Hadedy et al. ([41]))
• 11:21, 19 October 2010 (diff | hist) . . (+284)‎ . . m SHA-3 Hardware Implementations ‎ (→‎References: Added reference for El Hadedy et al. ([41]))
• 12:41, 12 October 2010 (diff | hist) . . (-117)‎ . . m SHA-3 Hardware Implementations ‎ (→‎References: Updated reference [30])
• 12:39, 12 October 2010 (diff | hist) . . (+4,306)‎ . . m SHA-3 Hardware Implementations ‎ (→‎All 14 Round-Two Candidates: Added Altera Stratix III results from Homsirikamol et al.)
• 12:19, 12 October 2010 (diff | hist) . . (+2,052)‎ . . m SHA-3 Hardware Implementations ‎ (→‎All 14 Round-Two Candidates: Replaced Virtex 5 results from Gaj et al. (CHES 2010) with those of Homsirikamol et al.)
• 12:01, 12 October 2010 (diff | hist) . . (+12,394)‎ . . m SHA-3 Hardware Implementations ‎ (→‎High-Speed Implementations (FPGA): Updated results from Gaj et al. (CHES 2010) with results from Homsirikamol et al.)
• 12:04, 15 September 2010 (diff | hist) . . (+368)‎ . . m SHA-3 Hardware Implementations ‎ (→‎Low-Area Implementations (ASIC): Added results from RCIS webpage [39])
• 12:03, 15 September 2010 (diff | hist) . . (+741)‎ . . m SHA-3 Hardware Implementations ‎ (→‎High-Speed Implementations (ASIC): Added results from RCIS webpage [39])
• 11:56, 15 September 2010 (diff | hist) . . (+139)‎ . . m SHA-3 Hardware Implementations ‎ (→‎References: Added reference for RCIS webpage (other ASIC implementations))
• 18:03, 14 September 2010 (diff | hist) . . (+93)‎ . . m SHA-3 Hardware Implementations ‎ (→‎High-Speed Implementations (ASIC): Added results from Satoh et al. [38])
• 18:00, 14 September 2010 (diff | hist) . . (+423)‎ . . m SHA-3 Hardware Implementations ‎ (→‎Low-Area Implementations (ASIC): Added results from Satoh et al. [38])
• 17:55, 14 September 2010 (diff | hist) . . (+372)‎ . . m SHA-3 Hardware Implementations ‎ (→‎High-Speed Implementations (ASIC): Added results from Satoh et al. [38])
• 17:49, 14 September 2010 (diff | hist) . . (+338)‎ . . m SHA-3 Hardware Implementations ‎ (→‎References: Added reference for Satoh et al.)
• 17:30, 14 September 2010 (diff | hist) . . (+5,223)‎ . . m SHA-3 Hardware Implementations ‎ (→‎High-Speed Implementations (ASIC): Added ASIC results for implementations of Matsuo et al. (from [37]))
• 17:21, 14 September 2010 (diff | hist) . . (+113)‎ . . m SHA-3 Hardware Implementations ‎ (→‎References: Added reference for standard-cell versions of implementations from Matsuo et al.)
• 17:18, 14 September 2010 (diff | hist) . . (+2,648)‎ . . m SHA-3 Hardware Implementations ‎ (→‎All 14 Round-Two Candidates: Added 90 nm results from RCIS webpage)
• 12:41, 14 September 2010 (diff | hist) . . (+1,092)‎ . . m SHA-3 Hardware Implementations ‎ (→‎High-Speed Implementations (FPGA): Added link to HDL sources for [33])
• 12:31, 14 September 2010 (diff | hist) . . (+77)‎ . . m SHA-3 Hardware Implementations ‎ (→‎All 14 Round-Two Candidates: Added link to HDL sources for Matsuo et al.)
• 20:32, 6 September 2010 (diff | hist) . . (-4)‎ . . m SHA-3 Hardware Implementations ‎ (→‎High-Speed Implementations (ASIC): Corrected gate count for Guo et al. and Akin et al.)
• 20:28, 6 September 2010 (diff | hist) . . (-1)‎ . . m SHA-3 Hardware Implementations ‎ (→‎All 14 Round-Two Candidates: Corrected gate count)
• 20:26, 6 September 2010 (diff | hist) . . (-5)‎ . . m SHA-3 Hardware Implementations ‎ (→‎Blue Midnight Wish, Keccak, Luffa: Corrected gate count)
• 20:25, 6 September 2010 (diff | hist) . . (+360)‎ . . m SHA-3 Hardware Implementations ‎ (→‎High-Speed Implementations (ASIC): Added results from Walker et al.)
• 20:21, 6 September 2010 (diff | hist) . . (+259)‎ . . m SHA-3 Hardware Implementations ‎ (→‎References: Added reference for Walker et al.)
• 20:18, 6 September 2010 (diff | hist) . . (+4,509)‎ . . m SHA-3 Hardware Implementations ‎ (→‎High-Speed Implementations (ASIC): Added results from Guo et al.)
• 20:13, 6 September 2010 (diff | hist) . . (+2,490)‎ . . m SHA-3 Hardware Implementations ‎ (→‎Comparative Studies: Added results from Guo et al.)
• 20:02, 6 September 2010 (diff | hist) . . (+37)‎ . . m SHA-3 Hardware Implementations ‎ (→‎All 14 Round-Two Candidates: Added note that results listed for Tillich et al. are just the post-synthesis ones.)
• 20:01, 6 September 2010 (diff | hist) . . (+341)‎ . . m SHA-3 Hardware Implementations ‎ (→‎References: Added reference for Guo et al.)
• 19:45, 6 September 2010 (diff | hist) . . (+1,094)‎ . . m SHA-3 Hardware Implementations ‎ (→‎High-Speed Implementations (ASIC): Added results from Akin et al.)
• 19:43, 6 September 2010 (diff | hist) . . (+3,365)‎ . . m SHA-3 Hardware Implementations ‎ (→‎High-Speed Implementations (FPGA): Added results from Akin et al.)
• 19:40, 6 September 2010 (diff | hist) . . (+1)‎ . . m SHA-3 Hardware Implementations ‎ (→‎Blue Midnight Wish, Keccak, Luffa)
• 19:34, 6 September 2010 (diff | hist) . . (+5,017)‎ . . m SHA-3 Hardware Implementations ‎ (→‎Comparative Studies: Added results from Akin et al.)
• 19:13, 6 September 2010 (diff | hist) . . (+403)‎ . . m SHA-3 Hardware Implementations ‎ (→‎References: Added reference for Akin et al.)
• 19:05, 6 September 2010 (diff | hist) . . (+4,889)‎ . . m SHA-3 Hardware Implementations ‎ (→‎High-Speed Implementations (FPGA): Added results from Matsuo et al.)
• 18:59, 6 September 2010 (diff | hist) . . (+2,476)‎ . . m SHA-3 Hardware Implementations ‎ (→‎Comparative Studies: Addes results from Matsuo et al.)
• 18:42, 6 September 2010 (diff | hist) . . (+415)‎ . . m SHA-3 Hardware Implementations ‎ (→‎References: Added reference for Matsuo et al.)
• 18:36, 6 September 2010 (diff | hist) . . (+762)‎ . . m SHA-3 Hardware Implementations ‎ (→‎Low-Area Implementations (FPGA): Added results from El Hadedy et al.)
• 18:28, 6 September 2010 (diff | hist) . . (+379)‎ . . m SHA-3 Hardware Implementations ‎ (→‎References: Added reference for El Hadedy et al.)
• 18:23, 6 September 2010 (diff | hist) . . (+10,721)‎ . . m SHA-3 Hardware Implementations ‎ (→‎High-Speed Implementations (FPGA): Added results from Baldwin et al. (2nd SHA-3))
• 18:14, 6 September 2010 (diff | hist) . . (+4,099)‎ . . m SHA-3 Hardware Implementations ‎ (→‎Comparative Studies: Added results from Baldwin et al. (no wrapper, long messages))
• 17:30, 6 September 2010 (diff | hist) . . (+351)‎ . . m SHA-3 Hardware Implementations ‎ (→‎References: Added reference for Baldwin et al. (2nd SHA-3 workshop))
• 17:07, 6 September 2010 (diff | hist) . . (+4,036)‎ . . m SHA-3 Hardware Implementations ‎ (→‎High-Speed Implementations (FPGA): Added results from Gaj et al. (Xilinx 5 ATHENa benchmarking))
• 16:43, 6 September 2010 (diff | hist) . . (+369)‎ . . m SHA-3 Hardware Implementations ‎ (→‎References: Added reference for Gaj et al.)
• 16:40, 6 September 2010 (diff | hist) . . (+2,631)‎ . . m SHA-3 Hardware Implementations ‎ (→‎Comparative Studies: Added results from Gaj et al. (for Virtex 5))
• 16:15, 6 September 2010 (diff | hist) . . (+5,110)‎ . . m SHA-3 Hardware Implementations ‎ (→‎High-Speed Implementations (ASIC): Added results from Henzen et al.)
• 16:08, 6 September 2010 (diff | hist) . . (0)‎ . . m SHA-3 Hardware Implementations ‎ (→‎All 14 Round-Two Candidates)
• 16:04, 6 September 2010 (diff | hist) . . (+563)‎ . . m SHA-3 Hardware Implementations ‎ (→‎All 14 Round-Two Candidates: Added implementation details for Henzen et al.)
• 15:55, 6 September 2010 (diff | hist) . . (+362)‎ . . m SHA-3 Hardware Implementations ‎ (→‎References: Added reference for Henzen et al.)
• 15:51, 6 September 2010 (diff | hist) . . (+2,484)‎ . . m SHA-3 Hardware Implementations ‎ (→‎Comparative Studies: Added results for 20 Gbps target from Henzen et al.)
• 15:12, 6 September 2010 (diff | hist) . . (+771)‎ . . m SHA-3 Hardware Implementations ‎ (Added section for ongoing HW benchmarking efforts (mentioning ATHENa))
• 15:48, 31 August 2010 (diff | hist) . . (+1,528)‎ . . m SHA-3 Hardware Implementations ‎ (→‎High-Speed Implementations (FPGA): Added tradeoff implementations from Ramakers and Narinx)
• 15:44, 31 August 2010 (diff | hist) . . (+470)‎ . . m SHA-3 Hardware Implementations ‎ (→‎ECHO, Hamsi, Luffa: Added tradeoff versions from Ramakers and Narinx)
• 12:51, 31 August 2010 (diff | hist) . . (+85)‎ . . m SHA-3 Hardware Implementations ‎ (→‎High-Speed Implementations (FPGA): Corrected description of implementations of Ramakers and Narinx)
• 12:49, 31 August 2010 (diff | hist) . . (+85)‎ . . m SHA-3 Hardware Implementations ‎ (→‎ECHO, Hamsi, Luffa: Corrected description of implementations from Ramakers and Narinx)
• 12:06, 31 August 2010 (diff | hist) . . (+346)‎ . . m SHA-3 Hardware Implementations ‎ (→‎Low-Area Implementations (FPGA): Added combined ECHO/AES results from Beuchat)
• 15:02, 27 August 2010 (diff | hist) . . (+144)‎ . . m SHA-3 Hardware Implementations ‎ (→‎References: Added reference for Mabrouk and Benadjila)
• 14:58, 27 August 2010 (diff | hist) . . (+837)‎ . . m SHA-3 Hardware Implementations ‎ (→‎High-Speed Implementations (FPGA): Added results from Mabrouk and Benadjila)
• 14:39, 27 August 2010 (diff | hist) . . (+289)‎ . . m SHA-3 Hardware Implementations ‎ (→‎References: Added reference for Mikami et al.)
• 14:37, 27 August 2010 (diff | hist) . . (+348)‎ . . m SHA-3 Hardware Implementations ‎ (→‎Low-Area Implementations (ASIC): Added results from Mikami et al.)
• 12:23, 2 August 2010 (diff | hist) . . (+42)‎ . . m SHA-3 Hardware Implementations ‎ (→‎High-Speed Implementations (FPGA): Added link to HDL sources for [26])
• 17:22, 21 July 2010 (diff | hist) . . (+310)‎ . . m SHA-3 Hardware Implementations ‎ (→‎High-Speed Implementations (FPGA): Added results of Francq and Thuillet)
• 17:16, 21 July 2010 (diff | hist) . . (+277)‎ . . m SHA-3 Hardware Implementations ‎ (→‎References: Added Francq and Thuillet. Corrected reference [24].)
• 11:29, 21 July 2010 (diff | hist) . . (+112)‎ . . m SHA-3 Hardware Implementations ‎ (→‎ECHO, Hamsi, Luffa: Added VHDL sources link)
• 11:28, 21 July 2010 (diff | hist) . . (+336)‎ . . m SHA-3 Hardware Implementations ‎ (→‎High-Speed Implementations (FPGA): Added sources for work of Ramakers and Narinx (hosted by SHA-3 zoo as per request of the authors))
• 11:25, 21 July 2010 (diff | hist) . . (+94)‎ . . N File:Ramakers Narinx2010ECHO-Hamsi-Luffa VHDL sources.zip ‎ (VHDL sources sent by Wim Ramakers on July 19, 2010 with request to be hosted on SHA-3 webpage.) (current)
• 11:06, 21 July 2010 (diff | hist) . . (+1,271)‎ . . m SHA-3 Hardware Implementations ‎ (→‎Comparative Studies: Added results of Ramakers and Narinx)
• 11:02, 21 July 2010 (diff | hist) . . (+7)‎ . . m SHA-3 Hardware Implementations ‎ (→‎High-Speed Implementations (FPGA): Corrected categorization of Hamsi implemenation of Ramakers and Narinx following comment from authors)

(newest | oldest) View (newer 100 | older 100) (20 | 50 | 100 | 250 | 500)