Difference between revisions of "SHA-3 Hardware Implementations"
From The ECRYPT Hash Function Website
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| + | == High-Speed ASIC Implementations == | ||
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{| border="1" cellpadding="4" cellspacing="0" align="center" class="wikitable" | {| border="1" cellpadding="4" cellspacing="0" align="center" class="wikitable" | ||
|- style="background:#efefef;" | |- style="background:#efefef;" | ||
| − | ! width="120"| Hash Function Name | + | ! width="120"| Hash Function Name !! width="150"| Reference !! width="200"| Implementation Details !! width="150"| Technology !! width="100"| Size !! width="100"| Throughput !! width="100"| Clock Frequency |
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| − | | Grøstl-224/256 || | + | | Grøstl-224/256 || Submission document || P & Q permutation in parallel || 0.18 µm std-cell lib || 131 kGates || 4379 Mbit/s || 85.5 MHz |
|- | |- | ||
| + | | Grøstl-384/512 || Submission document|| P & Q permutation in parallel || 0.18 µm std-cell lib || 341 kGates || 6225 Mbit/s || 85.1 MHz | ||
| + | |- | ||
| + | | MD6 || Submission document|| Compression function only, 48 parallel steps || GPDSK 90nm std-cell lib || 145 kGates || N/A || 200 MHz | ||
| + | |- | ||
| + | | MD6 || Submission document|| Compression function & memory control logic, 16 parallel steps || GPDSK 90nm std-cell lib || 105 kGates || N/A || 200 MHz | ||
| + | |- | ||
| + | | Keccak || Submission document || Core (round function, state register) & IO buffer || ST 0.13 µm std-cell lib || 48 kGates || 28400 Mbit/s || 500 MHz | ||
| + | |- | ||
| + | | Keccak || Submission document || Core (round function, state register) only || ST 0.13 µm std-cell lib || 40 kGates || 15000 Mbit/s || 500 MHz | ||
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| + | == Low-Area ASIC Implementations == | ||
Revision as of 17:09, 6 November 2008
1 High-Speed ASIC Implementations
| Hash Function Name | Reference | Implementation Details | Technology | Size | Throughput | Clock Frequency |
|---|---|---|---|---|---|---|
| Grøstl-224/256 | Submission document | P & Q permutation in parallel | 0.18 µm std-cell lib | 131 kGates | 4379 Mbit/s | 85.5 MHz |
| Grøstl-384/512 | Submission document | P & Q permutation in parallel | 0.18 µm std-cell lib | 341 kGates | 6225 Mbit/s | 85.1 MHz |
| MD6 | Submission document | Compression function only, 48 parallel steps | GPDSK 90nm std-cell lib | 145 kGates | N/A | 200 MHz |
| MD6 | Submission document | Compression function & memory control logic, 16 parallel steps | GPDSK 90nm std-cell lib | 105 kGates | N/A | 200 MHz |
| Keccak | Submission document | Core (round function, state register) & IO buffer | ST 0.13 µm std-cell lib | 48 kGates | 28400 Mbit/s | 500 MHz |
| Keccak | Submission document | Core (round function, state register) only | ST 0.13 µm std-cell lib | 40 kGates | 15000 Mbit/s | 500 MHz |
